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European Case Law Identifier: | ECLI:EP:BA:2015:T184111.20151203 | ||||||||
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Date of decision: | 03 December 2015 | ||||||||
Case number: | T 1841/11 | ||||||||
Application number: | 08001964.9 | ||||||||
IPC class: | H01L 21/20 H01L 21/762 |
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Language of proceedings: | EN | ||||||||
Distribution: | B | ||||||||
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Title of application: | Method for manufacturing semiconductor substrate | ||||||||
Applicant name: | Shin-Etsu Chemical Co., Ltd. | ||||||||
Opponent name: | – | ||||||||
Board: | 3.4.03 | ||||||||
Headnote: | – | ||||||||
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Keywords: | Inventive step – (no) Inventive step – closest prior art Inventive step – problem and solution approach |
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Catchwords: |
The closest prior art should relate to the same or at least a similar purpose (or objective) as the claimed invention. Even if prior art relating to the same purpose is available, it is not excluded that a document relating to a similar purpose might be considered to represent a better – or at least an equally plausible – choice of closest prior art, provided that it would be immediately apparent to the skilled person that what is disclosed in the document could be adapted to the purpose of the claimed invention in a straightforward manner, using no more than common general knowledge (Reasons, point 2.6). If, despite the availability of prior art relating to the same purpose as the claimed invention (here: manufacturing a semiconductor substrate comprising a silicon-germanium film), it is nevertheless considered appropriate to select as closest prior art a disclosure relating to a similar purpose (here: manufacturing a semiconductor substrate comprising a germanium film), at least one claimed feature corresponding to the purpose of the invention will generally appear as a difference over the closest prior art (here: silicon-germanium). However, this difference is not one which can legitimately be invoked in support of inventive step. The problem-solution approach presupposes that the skilled person has a purpose in mind from the very beginning of the inventive process, which in this case is the manufacture of a known type of semiconductor substrate comprising a silicon-germanium film. Within this conceptual framework, it cannot be logically argued that the skilled person would find no motivation to incorporate silicon-germanium. Moreover, an argument that it would not be straightforward to incorporate this difference into the teaching of the document considered to be closest prior art, or that this would require more than common general knowledge, would not, in such a case, constitute an argument in favour of inventive step, but rather an argument that this document is not in fact a promising starting point (Reasons, point 4.1). |
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Summary of Facts and Submissions
I. The appeal is against the decision of the Examining Division refusing European patent application No. 08 001 964 on the ground that the claimed subject-matter did not involve an inventive step within the meaning of Article 56 EPC.
II. At the end of the oral proceedings held before the Board the appellant confirmed its sole request that the decision under appeal be set aside, and that a patent be granted on the basis of claims 1-4 as filed with the letter dated 10 January 2011.
III. The following documents are referred to:
D1: WO 2004/027858 A1
D2: US 2006/099773 A1
D4: US 2006/054891 A1
D7: US 2005/191824 A1
D8: US 7 094 667 B1
D9: Kirk H R et al: Plasma-Activated Bonding, Controlled Cleave Process, and Non-Contact Smoothing for Germanium-on-Insulator (GeOI) Manufacturing; Proceedings of the 2004 IEEE International SOI Conference, 4-7 October 2004, pages 65-66.
IV. Claim 1 of the main request reads as follows:
“A method for manufacturing a semiconductor substrate comprising the steps of (A) to (F) in this order:
(A) epitaxially growing a silicon germanium (SiGe) film (11) on a silicon (Si) substrate (10) by a chemical vapor deposition method, wherein the Ge content of the SiGe film (11) is l0% or more by molar ratio;
(B) subjecting a heat treatment to the SiGe film (11) at a temperature of not less than 700°C and not more than 1200°C;
(C) implanting hydrogen ions into a surface of the SiGe film (11);
(D) subjecting a surface activation treatment to a main surface of at least one of the SiGe film (11) and a support substrate (20);
(E) bonding the main surfaces of the SiGe film (11) and the support substrate (20) at a temperature of not less than 100°C and not more than 400°C; and
(F) applying an external impact to a bonding interface between the SiGe film (11) and the support substrate (20) to mechanically delaminate the SiGe crystal along a hydrogen ion implanted interface (13) of the SiGe film (11), thereby forming a SiGe thin film (14) on the main surface of the support substrate (20).”
V. The appellant’s arguments, insofar as they are relevant to the present decision, may be summarised as follows:
While it was true that document D4 disclosed a method for manufacturing a substrate comprising a silicon germanium (SiGe) layer, as in claim 1, it was a rather complicated process involving the deposition of a graded SiGe layer (paragraph [0032]) and a buffer SiGe layer (paragraph [0033]). Hence, in the light of the application as a whole, document D2, which disclosed a method for manufacturing a substrate comprising a germanium (Ge) layer, was to be regarded as the closest prior art.
Claim 1 differed from document D2 in that:
a) the film was SiGe instead of Ge;
b) the film had a Ge content of 10% or more by molar ratio;
c) the bonding step E took place at a temperature of 100-400°C; and
d) the film was mechanically delaminated by applying an external impact.
In addition, paragraph [0023] of document D2 implied that hydrogen was implanted from the substrate side, which appeared to be a further difference.
Feature a) had the advantage that one could use the superior carrier mobility of the Ge material (cf. paragraph [0002]) while having a SiGe layer allowed preventing lattice defects (cf. paragraph [0003]), which would otherwise arise due to the different lattice constants of Si and Ge.
Document D2 remedied the problem of the difference in the lattice constants of Si and Ge by using a two-step CVD process with Ge. The formation of a SiGe layer was not merely an alternative to that of the two-step CVD process with Ge in D2, but provided an easier way for manufacturing a substrate with high carrier mobility and low lattice defects. Following the problem-solution approach, the skilled person would require an explicit teaching in another document that using a SiGe layer instead of two pure Ge layers prevented the formation of lattice defects, and it was not apparent which document from the prior art had this teaching. Without this teaching the skilled person would stick to the two-step CVD process with Ge described in paragraph [0009] of document D2.
In the hypothetical case that the skilled person would nevertheless combine the teachings of D2 and D4, he would arrive at a graded SiGe layer on the Si substrate. However, it was an aim of the present invention to circumvent such graded layers, as this required depositing on a Si substrate a number of SiGe layers with slightly increasing Ge concentrations (cf. paragraph [0003]), which in turn increased the manufacturing costs (cf. paragraph [0005]). With the steps of claim 1, the laborious and costly method for producing a graded SiGe layer could be avoided. If the skilled person followed the teaching of D2 and D4, he would arrive at a different method to that of claim 1. Similarly, combining the disclosures of D2 and D1 would not lead to the claimed method.
The effect of feature b) was explained in paragraph [0033] of the application as follows: “In order to suppress the generation of dislocations near the interface between the SiGe epitaxial film 11 and the Si substrate 10 at a low level, the composition of the SiGe epitaxial film is preferably set such that the Ge content is 10% or more by molar ratio”. Thus, the technical effect of feature b) was to suppress the generation of dislocations and thereby increase productivity.
The skilled person had no information to use a Ge content of above 10% in order to suppress the generation of dislocations, and any such presumption would be based on hindsight taking into account the teaching of the present application. The skilled person would equivalently work in the regime of 0-10% and 10-100% Ge. From D2, there was no teaching that it is preferable to work in the upper regime. D4 disclosed a graded SiGe layer which was different to that defined in claim 1.
Feature c) defined that bonding took place at a temperature of 100-400°C. Below this range the bonding strength might be insufficient, and above this range minute cavities were formed in the hydrogen ion implanted interface. Accordingly, the range defined in claim 1 allowed a sufficiently high bonding strength while preventing minute cavities in the hydrogen ion implanted interface, which would roughen the surface of the Ge thin film after delamination (cf. paragraph [0027] of the application). Further, the heat treatment was performed during bonding, leading to a reduction in working hours and a decrease in manufacturing costs.
D2 merely described bonding at ambient temperature. Document D9 had two relevant teachings: the bonding should be carried out using a plasma, and the temperature should be below 300°C in the layer transfer process, i.e. during the delamination step. The temperature regime for bonding was not specified.
Concerning feature d), when delaminating was performed by thermal treatment, especially in case of bonding a silicon substrate and another material substrate, the difference of thermal expansion coefficient tended to damage the substrate and reduce production yield. The effect of feature d) was to avoid this. Document D9 appeared to teach using mechanical cleaving.
The effect of features a)-d) together was therefore to cooperatively help in increasing the productivity during semiconductor substrate manufacturing.
VI. With the summons to oral proceedings, a communication under Article 15(1) RPBA was sent setting out the provisional position of the Board. The Board expressed the view that document D2 was a reasonable starting point for discussing inventive step, and that features a)-d) identified by the appellant represented the distinguishing features of claim 1 over the closest prior art. The provisional conclusion of the Board was that claim 1 did not involve an inventive step within the meaning of Article 56 EPC 1973.
Reasons for the Decision
1. The appeal is admissible.
2. Closest Prior Art
2.1 The sole issue to be decided in the present appeal is whether the subject-matter of claim 1 involves an inventive step within the meaning of Article 52(1) EPC and Article 56 EPC 1973.
2.2 In the contested decision, the closest prior was considered to be document D2, which discloses a method of fabricating a low defect germanium film on a substrate, e.g. glass or silicon (see paragraph [0010]). In the communication pursuant to Article 15(1) RPBA, the Board also provisionally agreed that document D2 represented a reasonable starting point.
In the statement of grounds of appeal the appellant did not take an explicit position on this matter, but merely noted that “the Decision stated” that document D2 was the closest prior art. Nevertheless, the appellant went on to argue that the method disclosed in document D2 was “specialized only for Ge” (emphasis in the original) and that “Ge cannot be replaced with SiGe, and the invention described in D2 cannot be applied to the method for manufacturing the SiGe substrate.” Clearly, if this were accepted as accurate, document D2 would be an unlikely choice of closest prior art for the claimed method in which the deposited layer is SiGe.
In the letter of 20 October 2015, the appellant appeared to be content to start from document D2: “D2 may thus, as already recognized by the Boards of Appeal, be regarded as closest prior art document”. Nevertheless, the appellant argued that according to the problem-solution approach, “the skilled person would require an explicit teaching in another document that using a SiGe layer instead of two pure Ge layers allows preventing the formation of lattice defects”, which was considered to be the technical effect of using SiGe.
2.3 Given the appellant’s assessment of the difficulties that the skilled person would encounter in adapting the method of document D2 to a SiGe layer, which would allegedly require the skilled person to consult further prior art, and given that other documents were available explicitly disclosing methods for producing substrates comprising SiGe layers (e.g. documents D1 and D4), the Board suggested during the oral proceedings that one of these documents might represent a better choice of closest prior art than document D2. In particular, document D4 appeared to the Board to be a potentially suitable choice.
However, after having been given some time to consider this matter, the appellant argued that, in the light of the application as a whole, document D2 was the most suitable choice. It therefore falls to the Board to decide whether document D2 can indeed be accepted as the starting point for assessing inventive step.
2.4 In deciding this issue, the principles to be applied are well-established, and are, for example, summarised in T 835/00 as follows:
– “A host of jurisprudence has emerged from the Boards of Appeal on [the determination of the closest prior art] according to which that disclosure qualifies as closest prior art which relates to the same or at least a similar purpose (or objective) as the claimed invention and has the most relevant technical features in common” (T 835/00, Reasons, point 4.2; see also Case Law of the Boards of Appeal, 7th edn. 2013, I.D.3).
Hence, in order to be in a position to determine the closest prior art, it must first be established what the purpose (or objective) of the claimed invention is.
2.5 According to paragraph [0001] of the description, the invention “relates to a method for manufacturing a semiconductor substrate comprising a germanium-based epitaxial film”.
The present application describes, according to a first embodiment, a method for manufacturing a germanium on insulator (GeOI) substrate, and according to a second embodiment, a method for manufacturing a silicon germanium on insulator (SGOI) substrate. These embodiments were reflected in the claims as originally filed by an independent claim (claim 1) directed to a method for manufacturing a semiconductor substrate comprising a Ge film and an independent claim (claim 3) directed to a method for manufacturing a semiconductor substrate comprising a SiGe film. During the course of the examination procedure, the first of these independent claims was excised, and so the application now comprises a single independent claim to the second (SiGe) option.
The Board therefore considers that the purpose or objective of the claimed invention is to provide a method for manufacturing a semiconductor substrate comprising a SiGe film. As noted above, such substrates are known per se, and prior art methods for manufacturing them are disclosed in the cited documents, e.g. in documents D1 and D4.
2.6 As set out above, the closest prior art should relate to the same or at least a similar purpose (or objective) as the claimed invention. Even if prior art relating to the same purpose is available, it is not excluded that a document relating to a similar purpose might be considered to represent a better – or at least an equally plausible – choice of closest prior art, provided that it would be immediately apparent to the skilled person that what is disclosed in the document could be adapted to the purpose of the claimed invention in a straightforward manner, using no more than common general knowledge.
2.7 In the present case, document D2 discloses a method of manufacturing a substrate comprising a Ge film formed by a CVD process (paragraph [0017]), and hence the skilled person would understand that this CVD process would be carried out using only a Ge forming precursor. It would, however, be immediately apparent to the skilled person on the basis of common general knowledge in the art that by supplying both Si and Ge precursor gases (typically silane and germane) in the CVD process, the result would be a SiGe film rather than a pure Ge film, and the end product of the manufacturing method would therefore be a substrate comprising a SiGe film.
Document D2 therefore discloses a method having a similar purpose to that of the claimed invention, which could be readily adapted using common general knowledge to achieve the purpose of the claimed method. The Board is therefore satisfied that document D2 is a suitable choice for the closest prior art.
3. Differences over document D2
3.1 As argued by the appellant, claim 1 differs from document D2 in the following four features:
a) the film is of silicon germanium;
b) the film has a germanium content of 10% or more by molar ratio;
c) bonding takes place at a temperature of not less than 100°C and not more than 400°C; and
d) the film is mechanically delaminated by applying an external impact.
3.2 During the oral proceedings the appellant suggested that paragraph [0023] of document D2 pointed to a further difference in that it implied that hydrogen implantation took place from the substrate side.
The Board does not understand why the cited paragraph is considered to imply implantation in the manner alleged, nor was this adequately explained during the oral proceedings. Hence, it is considered that claim 1 differs from document D2 only in the four features a) – d) listed above.
4. Feature a)
4.1 If, despite the availability of prior art relating to the same purpose as the claimed invention (here: manufacturing a semiconductor substrate comprising a silicon-germanium film), it is nevertheless considered appropriate to select as closest prior art a disclosure relating to a similar purpose (here: manufacturing a semiconductor substrate comprising a germanium film), at least one claimed feature corresponding to the purpose of the invention will generally appear as a difference over the closest prior art (here: silicon-germanium).
However, this difference is not one which can legitimately be invoked in support of inventive step. The problem-solution approach presupposes that the skilled person has a purpose in mind from the very beginning of the inventive process, which in this case is the manufacture of a known type of semiconductor substrate comprising a silicon-germanium film. Within this conceptual framework, it cannot be logically argued that the skilled person would find no motivation to incorporate silicon-germanium. Moreover, an argument that it would not be straightforward to incorporate this difference into the teaching of the document considered to be closest prior art, or that this would require more than common general knowledge, would not, in such a case, constitute an argument in favour of inventive step, but rather an argument that this document is not in fact a promising starting point.
4.2 In the present case, the purpose of the invention is to provide a method for manufacturing a semiconductor substrate comprising a SiGe film, such substrates and manufacturing methods therefor being known per se, and hence the material of the film being SiGe is something which is assumed to be in the mind of the skilled person from the outset. An argument that it would not be obvious to select SiGe could be no more persuasive than an argument that where it is intended to make a salami sandwich, it would be inventive to choose salami as the filling.
4.3 Furthermore, the appellant’s argument that in order to use SiGe instead of Ge the skilled person would need to consult additional documents specifically relating to SiGe films is not accepted by the Board (see point 2.7, above). However, had the Board been persuaded by this argument, it would not have established that the claimed subject-matter is inventive, but only that document D2 would not be a suitable choice for the closest prior art.
Hence, feature a) cannot be considered to confer an inventive step on the claimed subject-matter.
5. Feature b)
5.1 It would be apparent to the skilled person that SiGe must, by definition, comprise some silicon and some germanium, and hence the Ge concentration of SiGe can, in principle, extend from just above 0% (pure Si) to just below 100% (pure Ge). According to claim 1, no upper limit for the Ge concentration is defined, and at the other end of the range only a Ge content of less than 10% (by molar ratio) is excluded. On purely general grounds the Board doubts whether selecting nine tenths of a known range could ever be considered inventive.
5.2 Moreover, since the aim is to profit from the known higher carrier mobility in Ge (see description of the present application, paragraph [0002]), it would be obvious to the skilled person that a substantial Ge content would be required in the SiGe, and there would be no motivation to restrict the Germanium content to less than 10%.
Feature b) therefore represents most of a known range, excluding only a small portion which would be of no interest to the skilled person.
5.3 The appellant pointed to paragraph [0033] of the application according to which a Ge content of “10% or more by molar ratio” acts to “suppress the generation of dislocations near the interface between the SiGe epitaxial film 11 and the Si substrate 10”.
It is well known that the greater the mismatch in lattice constants between an epitaxial film and a substrate, the greater the likelihood of dislocations near the interface. This is why the Ge concentration is increased gradually in the the graded layer of the prior art discussed in paragraph [0003] of the application. Paragraph [0033] directly contradicts this in implying that increasing the Ge content (“10% or more”) reduces the generation of dislocations.
On being asked to comment on this matter during oral proceedings, the appellant did not offer any further explanation. The assertion that the claimed range is advantageous for the reasons set out in paragraph [0033] cannot, therefore, be considered plausible.
Hence, feature b) is not seen as implying any inventive step.
6. Feature c)
6.1 According to feature c), bonding takes place at a temperature of not less than 100°C and not more than 400°C. The purpose of this is to increase bonding strength, as set out in paragraph [0035]:
– “As explained above, when a higher bonding strength is desired, bonding may be performed at a temperature of not less than 100°C and not more than 400°C, or a heat treatment at a temperature of not less than 100°C and not more than 400°C may be performed subsequent to bonding at room temperature.”
6.2 In document D2, the germanium thin film is bonded to the counter wafer at ambient temperature, after which the “bonded structure is annealed 44, at a temperature of 375°C or higher”. Although this is said to be to “facilitate splitting 46 of the bonded wafer”, the skilled person would be aware that such an annealing step subsequent to bonding would also have the effect of increasing the bond strength.
The Board therefore considers that the problem solved by feature c) is to provide an alternative means for achieving a higher bonding strength.
6.3 Subjecting a bonded substrate to an elevated temperature in order to improve the bond strength is a routine measure which would be well known to the skilled person. It is equally well known that this thermal treatment can be applied during or after bonding.
For example, among the cited documents, document D4 describes a “post-bonding anneal” at a temperature “from about 225°C to about 350°C” for bond strengthening (paragraphs [0046]-[0048]), and document D7 describes “a classic thermal treatment to strengthen the bonding interface” after the bonding step (paragraph [0023]). Alternatively, document D1 discloses that “a heat treatment carried out during bonding allows the strength of the bonds to be increased” (page 13, lines 29-31), and document D8 describes bonding “at a temperature equal to or less than 200°C” (see e.g. claim 1).
6.4 Hence, starting from document D2, it would be an obvious possibility to provide bond strengthening by combining the bonding and annealing steps, and equally obvious to employ the specific temperature mentioned in document D2 (375°C), which falls within the claimed range.
Alternatively, it would readily occur to the skilled person in the light of the prior art, to improve the bond strength by carrying out bonding at an elevated temperature, in addition to the subsequent anneal for facilitating splitting, for example at the bonding temperature mentioned in D8 (200°C), which falls within the claimed range.
6.5 The appellant argued that compared with bonding at ambient temperature and subsequent post-annealing, combining bonding and annealing has the advantage of eliminating one manufacturing step. Thus the problem was not merely to find an alternative means of strengthening the bond, but to reduce manufacturing costs.
Whilst this may be considered a plausible advantage, an equally plausible disadvantage associated with bonding at elevated temperatures would be having to perform the bonding step in the interior of the annealing oven, which might also have cost implications.
However, even if the appellant’s problem were accepted, the skilled person would, in the opinion of the Board, regard bonding at an elevated temperature and bonding at ambient temperature with a subsequent post-anneal as well-known and obvious alternatives, each having readily foreseeable advantages and disadvantages, and would therefore choose between them without exercising any inventive activity.
Hence, feature c) is not seen as implying an inventive step.
7. Feature d)
7.1 Feature d) requires that the film is mechanically delaminated by applying an external impact. In the statement of grounds of appeal, the appellant argued that this established a clear difference over the closest prior art in which delamination by thermal treatment was proposed:
– “The delaminating method by the thermal treatment of D2 is so-called ‘Smartcut® method’ and needs a treatment at high temperature (generally it is about 500°C) for delaminating as its name of ‘thermal treatment’ indicates.”
In actual fact, the Board doubts whether document D2 discloses any specific method for splitting the wafer. In paragraph [0023] annealing at a temperature of 375°C or higher is performed to “facilitate” splitting of the bonded wafer. However, it is clear from paragraph [0009] and from claim 1 of document D2 that annealing “to facilitate splitting” and the subsequent “splitting” are two different steps, and there appears to be no specific disclosure of how the splitting – as opposed to the facilitation of the splitting – is carried out.
It is, however, at least clear that splitting by applying an external impact is not disclosed in document D2, and hence feature d) represents a difference between claimed subject-matter and the closest prior art.
7.2 According to the appellant, when the substrate is produced by bonding dissimilar materials having different thermal expansion coefficients, performing delamination by thermal treatment can lead to the problems that “the substrate tends to be broken, and partial cracking, blisters and voids tend to be generated.” Feature d) solves this problem and thereby improves yields.
7.3 It is not stated in the application that mechanical delamination solves the problems arising from a mismatch in thermal expansion coefficients. These problems are discussed in paragraph [0028], but only in the context of the heat treatment for bond strengthening (paragraph [0027]).
In fact, no particular technical effect is mentioned in the application in relation to delaminating by external impact (paragraph [0029]), nor is any reason explicitly given for performing delamination in this way. It is also not claimed or stated anywhere in the application that this step should take place at room temperature or even at a low temperature.
7.4 Although feature d) is not disclosed in the application as having the technical effect of avoiding damage to the substrate, the appellant presumably considers that the skilled person could deduce from the application as filed (in particular paragraph [0028]) that mechanical delamination would in fact have this effect, since it would not require the high temperatures which would damage a substrate comprising wafers with a mismatch in thermal expansion coefficients.
7.5 In formulating the problem solved by a claimed feature, it may, in principle, be allowable to rely on an effect not mentioned in the application in connection with this feature. However, it should be clear that the effect would be attainable throughout the entire range covered by the claimed subject-matter (see Case Law of the Boards of Appeal, 7th edition 2013, I.D.4.4.2).
In the opinion of the Board, in order to acknowledge that a problem is solved over the whole breadth of a claim, it must first be plausible that the problem would actually arise over the whole breadth of the claim.
7.6 In paragraph [0028] the problems resulting from a mismatch in thermal expansion coefficients are said to arise when the support substrate (20) is quartz. In this case, as a result of the large difference between the thermal expansion coefficients of Si (the material of substrate 10) and quartz, a heat treatment at a temperature over 350°C may cause cracking due to thermal strains or even a broken substrate.
However, claim 1 does not specify any particular material for the support substrate, and quartz is merely one possibility mentioned in paragraph [0015]. According to the described embodiments, the support substrate is a “silicon wafer with an oxide film” (paragraph [0018]), and in this case, with both substrates being made of Si, there would be no mismatch of the thermal expansion coefficients and the problem referred to above would not arise.
A problem which is not mentioned in the application in relation to the claimed feature, and which would not arise over the whole ambit of the claim, or even for those embodiments described in detail in the application (paragraphs [0019]-[0036]), cannot be considered a suitable choice.
Hence, a less ambitious problem must be chosen, which, in the present case, can only be seen in general terms as selecting a suitable splitting method.
7.7 The appellant accepts that the claimed mechanical technique is taken from the method developed by Silicon Genesis Corporation (the “SiGen” method):
– “On the other hand, ‘the mechanical delamination’ of the present invention is so-called ‘SiGen method’ and can perform delaminating at room temperature…” (Statement of grounds of appeal).
7.8 It has never been disputed that the “SiGen” method was available to the public before the priority date, and the Board does not accept that the mere adoption of an existing splitting technique from among a limited number of other known options (e.g. Smartcut) represents an inventive contribution to the art.
8. The distinguishing features of claim 1 are therefore obvious in themselves, and the Board can see no reason to believe that, taken together, they represent an inventive combination. The subject-matter of claim 1 does not therefore involve an inventive step within the meaning of Article 52(1) EPC and Article 56 EPC 1973.
Order
For these reasons it is decided that:
The appeal is dismissed.